1. Field of the Invention
The present invention relates to the monolithic forming of image sensors intended to be used in shooting devices such as, for example, cameras, camcorders, digital microscopes, or digital photographic cameras. More specifically, the present invention relates to image sensors formed in CMOS technology.
2. Description of the Related Art
An image sensor formed in CMOS technology generally includes a matrix of photodetectors arranged at the intersection of lines and columns.
FIG. 1 schematically shows an example of a CMOS-type photodetector of an image sensor matrix. A photodiode D has its anode connected to a low reference voltage VSS. The cathode of photodiode D is connected to a detection node SN. An initialization MOS transistor T1 and a MOS measurement transistor T2, with N channels, have their drain connected to a high supply voltage VDD. The source of transistor T1 and the gate of transistor T2 are connected to detection node SN. The gate of transistor T1 receives a signal NI controlling the initialization of node SN. An N-channel MOS transistor T3 has its drain connected to the source of transistor T2. The gate of transistor T3 receives a line selection signal LS. The source of transistor T3 is connected to a read means 2. Read means 2 receives a read control signal ST. Means 2 is connected to other photodiodes, not shown, of the matrix.
The photodiode D of a photodetector such as in FIG. 1 may be formed in the same substrate as the other photodetector elements. Its light-receiving surface area must be sufficient to ensure a good detection, the surface area occupied by the other photodetector elements reducing the number of photons captured by the photodiode. To increase the surface area of the photodiode without increasing the total surface area of a photodetector, a solution consists of forming the photodiode above the other photodetector elements.
FIG. 2 schematically shows as an example a cross-section view of a photodiode D and of a MOS initialization transistor T1 of a photodetector, in which the photodiode is formed above the other photodetector elements. For readability reasons, the drawings representing the different semiconductor regions are not drawn to scale. Transistor T1 is formed in a P-type active area 4 delimited by a silicon oxide (SiO2) field insulation region 8. On either side of an insulated gate 10, are N-type source and drain regions 12 and 14 of transistor T1. Transistor T1 is covered with a layer 16 of an insulator (SiO2). Above layer 16 is formed an amorphous silicon layer including a lower region 18, an intermediary intrinsic layer 20, and an upper P-type layer 22, to form a PIN-type photodiode. Layer 22 forms the anode of the photodiode and region 18 forms the cathode of the photodiode. Layer 22 is covered with a conductive transparent ITO layer 24 connected to voltage VSS. Region 18 is connected by a conductive via 28 to source region 12. A conductive region 26 may be arranged under region 18.
FIG. 3 illustrates, in a phase of measurement of the light received by the photodetector of FIG. 1, the variations along time of signals LS and NI, of voltage VSN of node SN, and of signal ST. Transistor T2 is assembled as a follower of voltage VSN of node SN. For simplicity, it is assumed hereafter that transistor T2 has a unity gain and that the source voltage of transistor T2 is substantially equal to voltage VSN. It is thus considered that read means 2, connected to the source of transistor T2 via transistor T3, enables storing voltage VSN.
At a time t0, selection signal LS is at 1 so that transistor T3 is on and that the source of transistor T2 is connected to read means 2. Read signal ST is at 0 and read means 2 is deactivated. At time t0, initialization signal NI is brought to 1, for a short initialization duration, to bring voltage VSN to VDD. At the end of this initialization, signal NI falls back to 0. Voltage VSN then drops by a voltage xcex940, especially due to the capacitive coupling existing between the gate and the source of transistor T1, as well as to noise introduced by transistor T1.
At a time t1, after signal NI has returned to 0, signal ST is activated after a short time to control the reading of voltage VDD-xcex940 by means 2. From the time when transistor T1 is no longer on and when the photodiode cathode is no longer connected to VDD, and if photodiode D is submitted to a light radiation, electrons accumulate at the photodiode cathode. Voltage VSN of the cathode then decreases proportionally to the received light.
At a time t2, signal LS is brought to 0 to turn transistor T3 off and to isolate the photodetector from means 2. Means 2 can then be connected to another photodetector of the image sensor.
At a time t3, after a predetermined duration during which the photodiode is submitted to a light radiation which is desired to be measured, signal LS is brought back to 1 and transistor T3 is turned on.
At a time t4, signal ST is shortly activated to control the reading of voltage VSN by means 2. Voltage VSN then has a value VDD-xcex940-xcex941, where xcex941 depends on the number of photons received by the photodiode and on a negligible thermal noise. The measurement of VDD-xcex940-xcex941 is subtracted to the preceding measurement of VDD-xcex940 to know value xcex941 and thus the light received by the photodiode between times t1 and t4.
An amorphous silicon diode includes charge traps likely to store electrons for a so-called relaxation time. In each light measurement phase such as described in FIG. 3, part of the electrons accumulated in the photodiode cathode between times t1 and t4 are immobilized by the charge traps of the photodiode. Value xcex941 measured at the end of the measurement phase does not take into account the electrons stored in the charge traps, and the measurement is vitiated. Further, the duration of connection to voltage VDD during the initialization phase is insufficient to empty all the charge traps. Thus, at the beginning of each measurement phase, charge traps contain an amount of parasitic electrons which depends on the light received in one or several preceding measurement phases. These parasitic electrons, which are released at the end of the charge trap relaxation time, vitiate measured value xcex941. The value xcex941 measured at the end of each measurement phase thus partly depends on the light received in the preceding measurement phase(s). In an image sensor including a photodetector matrix, this electron retention phenomenon causes a remanence or a decay of the image. The significance of the decay especially depends on the amount of traps in the photodiode and of the average electron retention duration of these traps.
A known solution to suppress this decay phenomenon consists of limiting the number of traps in photodiode D. This solution implies forming photodiode D in a custom-made amorphous silicon, and implies a costly lengthening of the circuit manufacturing duration.
An embodiment of the present invention provides a CMOS photodetector including an amorphous silicon photodiode of simple structure, with a low-cost manufacturing, and which does not cause a decay phenomenon such as previously described.
The photodiode has its anode connected to a reference voltage and the photodetector further includes, an initialization MOS transistor connected between the cathode of the photodiode and a first supply voltage to set the cathode to the first supply voltage during an initialization phase, and means for measuring the voltage of the cathode of the photodiode, including saturation means for bringing the photodiode cathode to a saturation voltage close to the reference voltage immediately before the initialization phase.
According to an embodiment of the present invention, the source of the initialization MOS transistor is connected to the cathode of the photodiode and the photodetector includes a branching means adapted to bringing the drain of the initialization MOS transistor to the saturation voltage or to the first supply voltage.
According to an embodiment of the present invention, the initialization MOS transistor is controlled in low-inversion state.
According to an embodiment of the present invention, the initialization MOS transistor is controlled in strong-inversion state.
According to an embodiment of the present invention, the measurement means includes a measurement MOS transistor having its gate connected to the photodiode cathode, and a control MOS transistor connected in series with the measurement MOS transistor between a second supply voltage and a read means.
According to an embodiment of the present invention, the first and second supply voltages are equal.
Another embodiment of the present invention provides a method for measuring the light received by a photodetector including an amorphous silicon photodiode having its anode connected to a reference voltage, including the successive steps of:
a/ bringing the photodiode cathode to a saturation voltage close to the reference voltage;
b/ bringing the photodiode cathode to a supply voltage, then electrically isolating the cathode;
c/ performing a first measurement of the cathode voltage of the photodiode immediately after electrically isolating the cathode;
d/ submitting the photodiode to a light radiation for a determined duration; and
e/ performing a second measurement of the cathode voltage of the photodiode and subtracting the second measurement to the first measurement.
The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings. Other features and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.